timer1 registers-setting up 3 different frequency interrupts

i have project requires min of 2 stepper motors running @ different speeds.  using timerone class generate higher pulse frequency, using software calculate number of base periods required appropriately frequency each motor.  couple days ago set out write class allow 3 different frequencies generated individual interrupts.  here general understanding of how should work:
1.  set tccr1a & tccra ctc mode & appropriate prescalers
2.  set occr1a, occr1b, occr1c register appropriate compare value
3.  write interrupt function isr(timer1_compa_vect){}, isr(timer1_compb_vect){},  isr(timer1_compc_vect){}.
4.  set bits 3, 2, 1 in timsk1 turn on interrupts isr's

so have @ point compvala functions 100% right when run on own, however, b & c not run without occr1a set & run @ frequency.  starting wonder if possible want this, confirm possible? 

also, noticed interrupt vectors defined in ioxx.h shifted 1 compared the atmega2560 data sheet...shifting them match breaks pretty in arduino....so know why these don't match data sheet?


one thing dont yet know tccr1c forced output compare bits.  these do, 1 use for, should using it?

thanks attention, happy coding!

quick update:

after consulting logic diagram timer1, seems ocr1a different b&c in sense ocr1a sets value timer1 runs (and toggles clears/reset dependant on how com bits set).  explains why seem linked....but question is, whats point in having orc1b & ocr1c?  i'm sure there one, limited knowledge cannot see it.  i'd bet answer question me need to.

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